#ifndef _HERMIT_TARGET_PLATFORM_PIMUX_ARMADILLO800EVA_H_
#define _HERMIT_TARGET_PLATFORM_PIMUX_ARMADILLO800EVA_H_

#define PIN_FN_GPIO_PORT16	_PIN_FN(PIN_FMSOOLR,	MUX(0, 0, 1, PULL_DOWN))
#define PIN_FN_GPIO_PORT17	_PIN_FN(PIN_FMSOOBT,	MUX(0, 0, 1, PULL_DOWN))
#define PIN_FN_GPIO_PORT18	_PIN_FN(PIN_FMSOSLD,	MUX(0, 1, 0, PULL_OFF))
#define PIN_FN_GPIO_PORT74	_PIN_FN(PIN_MEMC_AD14,	MUX(0, 1, 0, PULL_OFF))
#define PIN_FN_GPIO_PORT75	_PIN_FN(PIN_MEMC_AD15,	MUX(0, 1, 0, PULL_OFF))
#define PIN_FN_GPIO_PORT97	_PIN_FN(PIN_MEMC_AD4,	MUX(0, 0, 1, PULL_OFF))
#define PIN_FN_GPIO_PORT98	_PIN_FN(PIN_MEMC_AD5,	MUX(0, 0, 1, PULL_OFF))
#define PIN_FN_GPIO_PORT99	_PIN_FN(PIN_MEMC_AD6,	MUX(0, 0, 1, PULL_OFF))
#define PIN_FN_GPIO_PORT100	_PIN_FN(PIN_MEMC_AD7,	MUX(0, 0, 1, PULL_OFF))
#define PIN_FN_GPIO_PORT101	_PIN_FN(PIN_FCE0_N,	MUX(0, 0, 1, PULL_OFF))
#define PIN_FN_GPIO_PORT102	_PIN_FN(PIN_FRB,	MUX(0, 1, 0, PULL_OFF))
#define PIN_FN_GPIO_PORT110	_PIN_FN(PIN_CS2_N,	MUX(0, 1, 0, PULL_OFF))
#define PIN_FN_GPIO_PORT111	_PIN_FN(PIN_CS4_N,	MUX(0, 0, 1, PULL_DOWN))
#define PIN_FN_GPIO_PORT167	_PIN_FN(PIN_D20,	MUX(0, 0, 1, PULL_OFF))
#define PIN_FN_GPIO_PORT177	_PIN_FN(PIN_WAIT_N,	MUX(0, 1, 0, PULL_OFF))
#define PIN_FN_GPIO_PORT199	_PIN_FN(PIN_MEMC_NWE,	MUX(0, 1, 0, PULL_OFF))

#define PIN_FN_SCIFA1_TXD_196	_PIN_FN(PIN_SCIFA_TXD_1,MUX(1, 1, 0, PULL_OFF))
#define PIN_FN_SCIFA1_RXD_195	_PIN_FN(PIN_SCIFA_RXD_1,MUX(1, 0, 1, PULL_UP))

#define PIN_FN_MMC_CLK_103	_PIN_FN(PIN_CS5B_N,	MUX(3, 1, 0, PULL_OFF))
#define PIN_FN_MMC_CMD_104	_PIN_FN(PIN_CS6A_N,	MUX(3, 1, 1, PULL_OFF))
#define PIN_FN_MMC_D0_149	_PIN_FN(PIN_D8,		MUX(3, 1, 1, PULL_OFF))
#define PIN_FN_MMC_D1_148	_PIN_FN(PIN_D9,		MUX(3, 1, 1, PULL_OFF))
#define PIN_FN_MMC_D2_147	_PIN_FN(PIN_D10,	MUX(3, 1, 1, PULL_OFF))
#define PIN_FN_MMC_D3_146	_PIN_FN(PIN_D11,	MUX(3, 1, 1, PULL_OFF))
#define PIN_FN_MMC_D4_145	_PIN_FN(PIN_D12,	MUX(3, 1, 1, PULL_OFF))
#define PIN_FN_MMC_D5_144	_PIN_FN(PIN_D13,	MUX(3, 1, 1, PULL_OFF))
#define PIN_FN_MMC_D6_143	_PIN_FN(PIN_D14,	MUX(3, 1, 1, PULL_OFF))
#define PIN_FN_MMC_D7_142	_PIN_FN(PIN_D15,	MUX(3, 1, 1, PULL_OFF))

#define PIN_FN_SDHI0_CLK_82	_PIN_FN(PIN_SDHICLK_0,	MUX(1, 1, 0, PULL_OFF))
#define PIN_FN_SDHI0_CMD_76	_PIN_FN(PIN_SDHICMD_0,	MUX(1, 1, 1, PULL_OFF))
#define PIN_FN_SDHI0_D0_77	_PIN_FN(PIN_SDHID0_0,	MUX(1, 1, 1, PULL_OFF))
#define PIN_FN_SDHI0_D1_78	_PIN_FN(PIN_SDHID1_0,	MUX(1, 1, 1, PULL_OFF))
#define PIN_FN_SDHI0_D2_79	_PIN_FN(PIN_SDHID2_0,	MUX(1, 1, 1, PULL_OFF))
#define PIN_FN_SDHI0_D3_80	_PIN_FN(PIN_SDHID3_0,	MUX(1, 1, 1, PULL_OFF))
#define PIN_FN_SDHI0_CD_81	_PIN_FN(PIN_SDHICD_0,	MUX(1, 0, 1, PULL_OFF))
#define PIN_FN_SDHI0_WP_82	_PIN_FN(PIN_SDHIWP_0,	MUX(1, 0, 1, PULL_OFF))

#define PIN_FN_ETH_CRS_205	_PIN_FN(PIN_SDHID0_2,	MUX(3, 0, 1, PULL_OFF))
#define PIN_FN_ETH_MDC_206	_PIN_FN(PIN_SDHID1_2,	MUX(3, 1, 0, PULL_OFF))
#define PIN_FN_ETH_MDIO_207	_PIN_FN(PIN_SDHID2_2,	MUX(3, 1, 1, PULL_OFF))
#define PIN_FN_ETH_TX_ER_203	_PIN_FN(PIN_SDHICLK_2,	MUX(3, 1, 0, PULL_OFF))
#define PIN_FN_ETH_RX_ER_204	_PIN_FN(PIN_SDHICMD_2,	MUX(3, 0, 1, PULL_OFF))
#define PIN_FN_ETH_ERXD0_185	_PIN_FN(PIN_SCIFA_SCK_1,MUX(3, 0, 1, PULL_OFF))
#define PIN_FN_ETH_ERXD1_186	_PIN_FN(PIN_SCIFB_RTS_N,MUX(3, 0, 1, PULL_OFF))
#define PIN_FN_ETH_ERXD2_187	_PIN_FN(PIN_SCIFB_CTS_N,MUX(3, 0, 1, PULL_OFF))
#define PIN_FN_ETH_ERXD3_188	_PIN_FN(PIN_SCIFA_SCK_0,MUX(3, 0, 1, PULL_OFF))
#define PIN_FN_ETH_TX_CLK_184	_PIN_FN(PIN_DACK_1_N,	MUX(3, 0, 1, PULL_OFF))
#define PIN_FN_ETH_TX_EN_183	_PIN_FN(PIN_DREQ_1_N,	MUX(3, 1, 0, PULL_OFF))
#define PIN_FN_ETH_ETXD0_171	_PIN_FN(PIN_D16,	MUX(3, 1, 0, PULL_OFF))
#define PIN_FN_ETH_ETXD1_170	_PIN_FN(PIN_D17,	MUX(3, 1, 0, PULL_OFF))
#define PIN_FN_ETH_ETXD2_169	_PIN_FN(PIN_D18,	MUX(3, 1, 0, PULL_OFF))
#define PIN_FN_ETH_ETXD3_168	_PIN_FN(PIN_D19,	MUX(3, 1, 0, PULL_OFF))
#define PIN_FN_ETH_PHY_INT_164	_PIN_FN(PIN_D25,	MUX(3, 0, 1, PULL_UP))
#define PIN_FN_ETH_COL_163	_PIN_FN(PIN_D26,	MUX(3, 0, 1, PULL_OFF))
#define PIN_FN_ETH_RX_DV_161	_PIN_FN(PIN_D28,	MUX(3, 0, 1, PULL_OFF))
#define PIN_FN_ETH_RX_CLK_174	_PIN_FN(PIN_A26,	MUX(3, 0, 1, PULL_OFF))

/* for platform */
#define xBSPIF0			PIN_FN_GPIO_PORT111
#define xBSPIF1			PIN_FN_GPIO_PORT17
#define xBSPIF2			PIN_FN_GPIO_PORT16
#define xJP1			PIN_FN_GPIO_PORT101
#define xSW1			PIN_FN_GPIO_PORT99
#define xSW2			PIN_FN_GPIO_PORT100
#define xSW3			PIN_FN_GPIO_PORT97
#define xSW4			PIN_FN_GPIO_PORT98
#define xLED1			PIN_FN_GPIO_PORT102
#define xLED2			PIN_FN_GPIO_PORT111
#define xLED3			PIN_FN_GPIO_PORT110
#define xLED4			PIN_FN_GPIO_PORT177
#define xUART_TXD		PIN_FN_SCIFA1_TXD_196
#define xUART_RXD		PIN_FN_SCIFA1_RXD_195

/* for driver */
#define xSDHI0_VS_B		PIN_FN_GPIO_PORT17
#define xSDHI0_PON		PIN_FN_GPIO_PORT74
#define xSDSLOT1_PON		PIN_FN_GPIO_PORT75
#define xSDSLOT1_CD		PIN_FN_GPIO_PORT167

#define xMMC0_RST_B		PIN_FN_GPIO_PORT199

#define xETH_PHYRST		PIN_FN_GPIO_PORT18

#endif
